RISC-V goes mainstream
By Drew Fustini. Posted
This article was originally published as part of HackSpace magazine, which has since been incorporated into Raspberry Pi Official Magazine.
Back at the beginning of this year, I wrote a column about RISC-V, a free and open instruction set architecture (ISA) created by researchers at UC Berkeley. An ISA specifies the tasks that a processor can perform, like a contract between the hardware and the software. RISC-V has had a lot of successes over the course of 2020, including a number of organisations who have taken this open-source standard and put it into practice in all sorts of exciting ways.
One of the companies that I’ve been keeping an eye on is SiFive, a startup founded by some of the original team behind RISC-V at UC Berkeley. SiFive has a similar business model to Arm: it designs processor cores that companies such as Microchip license for their own chips. Unlike Arm, SiFive is implementing an open instruction set architecture.
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Recently SiFive hit the news, announcing a global partnership with the BBC on its new STEM education development board: the BBC Doctor Who HiFive Inventor board. This hand-shaped board is part of a kit that teaches children to get started with programming and electronics, including sensors, a colourful, blinky LED matrix, buttons, a speaker, connectors, and both WiFi and Bluetooth connectivity. The kit also comes with a set of lessons voiced by the thirteenth Doctor, Jodie Whittaker.
This is a high-profile win for SiFive, as this kind of board would normally be based around a chip with an Arm core. Winning over the BBC for a project like this shows that SiFive has become a company that can compete with the chip design establishment, and it also shows that RISC-V is now mature enough as a standard to form a basis for mainstream products. SiFive has also been busy in other areas, including its new RISC-V PC based on the HiFive Unmatched board. This RISC-V PC can run a full graphical Linux desktop environment – another big achievement for free and open hardware.
Looking forward, we are going to see RISC-V making inroads into the massive mobile market, with Samsung announcing that it will use SiFive RISC-V cores in upcoming chips for use in 5G smartphones and AI image sensors. We will also see makers using RISC-V in lots of IoT projects thanks to Espressif, which is well-known for making the ESP8266 and ESP32 chips that ushered in a new age of low-cost WiFi. Espressif has now announced that it is making the ESP32-C3, a new generation of cheap WiFi chips that are powered by a 32-bit RISC-V core. It’s exciting to watch this free and open standard graduate from research departments and startups to global institutions and manufacturing giants, ending up on workbenches and desks at hackerspaces and schools all over the world.
Drew Fustini is a hardware designer and embedded Linux developer. He is the Vice President of the Open Source Hardware Association, and a board member of the BeagleBoard.org Foundation.
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